Single-Board Camera VCSBC nano Z 0392

Made for each other: The VCSBC nano Z board cameras with Dual-Core ARM and VC Linux operating system.

A smart idea video preview

Quick facts

  • 1/2.3" CMOS sensor, Sony® IMX392 Pregius®
  • Resolution: 1920 x 1200 pixel
  • Frame rate: 118 fps
  • High-speed shutter: 1 µs
  • Low-speed shutter: up to 2 s adjustable integration time
  • Dual-Core ARM with 2 x 866 MHz and integrated FPGA

Also available

  • as color version "C" (Bayer filter) on request
  • with external sensor board "RH", cable length 80-200 mm
  • as stereo vision systems with 2 external sensor boards "RH-2"
512
MD DDR-SDRAM
118
FRAMES PER SECOND
1920 x 1200
RESOLUTION
866
MHz DUAL-CORE ARM
12
PROGRAMMABLE I/Os
40 x 65
in mm DIMENSIONS
Dimensioned drawing for intelligent board camera series VCSBC nano Z.

Specifications

Sensor:
1/2.3" CMOS, SONY IMX392 Pregius, available as color version (Bayer filter)
Resolution:
1920(H) x 1200(V) active pixel
Pixel size:
3,45(H) µm x 3,45(V) µm
Shutter:
High-speed: 1 µs (min.). Low-speed: up to 2 s adjustable integration time
Integration:
Global shutter
Frame rate:
118 fps
Acquisition:
Program-controlled or external high speed trigger, full frame & partial scanning (ROI), jitterfree acquisition
Processor:
Dual-core ARM Cortex-A9 with 2 x 866 MHz and integrated FPGA
RAM:
512 MB DDR-SDRAM
Flash EPROM:
16 GB flash memory (nonvolatile)
Dig. I/Os:
12 programmable I/Os
Trigger I/Os:
1 trigger input (opto-decoupled), 1 flash trigger output (open collector)
Interfaces:
Ethernet 1Gbit, serial RS232, I²C
Power Supply:
12 - 24 V DC
Power consumption:
<2.4 W
Dimensions:
approx. 40 mm x 65 mm
Design type:
Sensor on-board

The ZQNC SoC module, basis for the Z models, increases the performance enormously thanks to the freely programmable FPGA. The programming of the FPGA itself has significant advantages whenever low power consumption and high-speed are mandatory.

MICHAEL ENGEL OWNER of Vision Components & INVENTOR OF THE SMART CAMERA
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