VC Compute Module Interface Board

3.1   Power, Trigger and PLC Connector POWIO

Pin Assignment of POWIO Connector (DSUB - male)

CMI Socket Frontal View	Pin	Signal	Level
	1	Main Power Supply	Vdd
	2	Common Ground	GND
	3	PLC In0	+5–24 V
	4	PLC Out0	Vdd
	5	PLC In1	+5–24 V
	6	PLC Out1	Vdd
	7	PLC Out2	Vdd
	8	PLC In2	+5–24 V
	9	PLC Out3	Vdd
	10	PLC In3	+5–24 V
	11	FLASH0	Vdd 0–1.5 A
	12	FLASH1	Vdd 0–1.5 A
	13	N/C	—
	14	TrigIn_P	+5 V
	15	TrigIn_M	GND

All inputs are 5–24 V, 2.4 mA @ 5 V and 5 mA @ 24 V, 200 kHz max., threshold: positive +1.3 mA typ., negative 0.7 mA typ.

3.1.2   POWIO Trigger Input

Electrical Specifications of the trigger Input

Separation of trigger input

Yes, optically isolated, 8 mA @ 5 V

Connection of Trigger Input

3.1.3   POWIO/LED A Flash Output

The Hardware features two independently adjustable current sources for the connection of two LED light sources. They are designed for controlling the ring illuminators around the lens, connected to LED A. They are also accessible over the connector POWIO.

The controller covers a current range from 150 to 1500 mA.

The duty cycle is limited to 1:8, i.e. the off-state is eight times longer than the on-state for the output. Example: 1 ms flash duration, 8 ms cool down duration.

The default FPGA has a protection which limits the maximum flash duration to 2 ms. This is to protect LEDs which cannot support 1.5 A over a longer time period. For developping own LED rings, there is also an analogue protection at FLASH₁ while the FLASH₀ can theoretically support 1.5 A steady (please note, that this current is not calculated to the nominal power consumption).

Technical Data for each LED Controller

Iout	150–1500 mA, programmable
Uout	4–16 V (1–4 LEDs in series depending on the Vf)

Warning

Do not connect inductive loads to FLASH₀ or FLASH₁ outputs!

Note

The default FPGA limits the maximum flash duration to 2 ms of both flash outputs for LED protection, while FLASH₁ is additionally limited by a slower analogue protection circuit.

FLASH₀ and FLASH₁ behave different: While the FLASH₀ output can be used for triggering, the FLASH₁ output is not intended for triggering external flash!

FLASH₁ has a small steady current flow for providing an instant power supply. This may lead to dark glimming LEDs connected to the FLASH₁ output while LEDs connected to the FLASH₀ output won't emit light (i.e. one half of a VC LED ring would glow).

3.1.3.1   Connection of Flash Outputs: External Flash

Connection of Flash Outputs using an external Flash Current Source and Opto-Isolation

The figure shows how to connect an external flash illumination to FLASH₀/TrigOut signal by using an opto isolation. R _limit should be chosen to protect the opto isolator, e.g. 2K2/250 mW for a current of 10 mA. Remark: R _limit is not necessary for Vision Components' High Power IR Illumination (VK002180). The current source should be set to 500 mA.

FLASH₁ output is not intended for triggering an external flash!

3.1.3.2   Connection of Flash Outputs: Direct High-Power-LEDs

Connection of Flash Outputs directly to High-Power LEDs

The figure shows how to connect an external flash illumination. The current source should be set to the required current setting between 200 and 1500 mA. The time limit must be set to an appropriate value for the protection of the LEDs according to the data sheet of the manufacturer. Connectable are 1 to 6 High Power LEDs.

3.1.3.3   Connection of Flash Outputs: PLC

Connection of Flash Outputs to a PLC

The figure shows how to connect a PLC to the FLASH₀/TrigOut or FLASH₁ signal. The current source should be set to 500 mA.

FLASH₁ output is not intended for triggering an external flash!

3.1.3.4   Connection of LED Rings over LED A: Internal Flash

Pin Assignment of LED A and LED B Connector

Camera Socket Top View	Pin	LED A Signal	LED B Signal
	1	GND	GND
	2	N/C	N/C
	3	FLASH0	N/C
	4	FLASH1	N/C

The current source should be set to the required current setting between 200 and 1500 mA. The time limit must be set to an appropriate value for the protection of the LEDs according to the data sheet of the manufacturer.

Warning

Be careful not to produce a short circuit between the VC MIPI sensor (which has a grounded surface) and the LED ring!

3.2   RS-232 and FPGA IO Connector RSIO

A FPGA IO connects to the onboard FPGA which itself may also be programmed to have connections to some RaspberryPi GPIOs.

Pin Assignment of RSIO Connector

Camera Socket Top View	Pin	Signal	Additional Information
	1	V24_TxD	Native RS-232 interface
	2	+3.3 V	—
	3	V24_RxD	Native RS-232 interface
	4	FPGA IO 1	Digital LVCMOS (3.3 V)
	5	GND	—
	6	FPGA IO 2	Digital LVCMOS (3.3 V)
	7	FPGA IO 0	Digital LVCMOS (3.3 V)
	8	FPGA IO 3	Digital LVCMOS (3.3 V)

3.3   The CAM0 Socket

The CAM0 Socket connects to CSI0 but to I2C1 for compatibility. The CAM0 Socket only supports 2 MIPI data lanes in contrast to the CAM1 socket with 4 lanes.

Beneath the CAM0 socket is a LED which emits green light if the CAM0 socket is powered.

Pin connections of the CAM0 Socket

Camera Socket	Pin	Signal
	1	+3.3 V
	2	I2C1 SDA
	3	I2C1 SCL
	4	GND
	5	FPGA CAM0 FLASH
	6	FPGA CAM0 TRIG
	7	GND
	8	N/C
	9	N/C
	10	GND
	11	N/C
	12	N/C
	13	GND
	14	CSI0 CP
	15	CSI0 CN
	16	GND
	17	CSI0 DP1
	18	CSI0 DN1
	19	GND
	20	CSI0 DP0
	21	CSI0 DN0
	22	GND

3.4   The CAM1 Socket

The CAM1 socket connects to CSI1 but to I2C0 for compatibility. Only this Socket supports 4 MIPI data lanes.

Beneath the CAM1 socket is a LED which emits green light if the CAM1 socket is powered.

Pin connections of the CAM1 Socket

Camera Socket	Pin	Signal
	1	+3.3 V
	2	I2C0 SDA
	3	I2C0 SCL
	4	GND
	5	FPGA CAM1 FLASH
	6	FPGA CAM1 TRIG
	7	GND
	8	CSI1 DP3
	9	CSI1 DN3
	10	GND
	11	CSI1 DP2
	12	CSI1 DN2
	13	GND
	14	CSI1 CP
	15	CSI1 CN
	16	GND
	17	CSI1 DP1
	18	CSI1 DN1
	19	GND
	20	CSI1 DP0
	21	CSI1 DN0
	22	GND

3.5   Display Interface Connector DISP1

The DISP1 Socket connects to DSI1 but to I2C0 for compatibility.

Pin Assignment of DISP1 Connector

Display Socket Top View	Pin	Signal
	1	GND
	2	DSI1 DN1
	3	DSI1 DP1
	4	GND
	5	DSI1 CN
	6	DSI1 CP
	7	GND
	8	DSI1 DN0
	9	DSI1 DP0
	10	GND
	11	I2C0 SCL
	12	I2C0 SDA
	13	GND
	14	+3.3 V
	15	+3.3 V
	16–30	N/C

The display itself needs the dt-blob.bin generated from the dt-blob.dts and copied into the /boot (not /boot/overlays) directory.

disable_touchscreen=1

3.6   RaspberryPi Compute Module Connector

3.7   Real Time Clock

The Maxim DS1374 RTC is connected to the FPGA I2C bus. It is accessible over address 0x68. An accumulator which buffers the RTC must be activated to be charged: The only allowed values for register 0x09 to be written are 0xaa for charging, and 0x00.

i2cdetect 3

modprobe -r rtc_ds1374
i2ctransfer -y 3 w2@0x68 0x09 0xaa
i2ctransfer -y 3 w1@0x68 0x09 r1@0x68
modprobe rtc-ds1374
hwclock --systohc
hwclock -r

3.8   JTAG Connector

The JTAG connector is the JTAG interface for programming the onboard FPGA.

Pin Assignment of the JTAG Connector

Camera Socket Top View	Pin	Signal
	1	+3.3 V
	2	FPGA TCK
	3	FPGA TDI
	4	FPGA TDO
	5	FPGA TMS
	6	GND

Information about programming the FPGA is covered in an extra document.

5.1   Preparation

For using the RaspberryPi Compute Module at the VC CMI board, it has to be flashed beforehand with a Raspbian Buster image.

At the time of writing, Raspbian Buster has neither enabled the UART interface, nor the SSH remote access. This means, that you cannot login to your system without prior modification of the /boot/config.txt (UART) and/or activation of the SSH server (raspi-config).

• For activation of the UART, and thus the RS232 interface at RSIO, add the following line to your /boot/config.txt:

  dtoverlay=uart0
  

• For activation of the SSH server, start the raspi-config program by running the following command:

  sudo raspi-config
  

  Then select Interfacing Options, then SSH and agree the question whether to enable the SSH server with <Yes>, leave the program.

5.2   Driver Installation

There is a DKMS driver as Debian package available for the VC MIPI modules which include the setup for the CMI GPIOs. Please visit our website to get it.

Debian packages can be installed by using the command dpkg -i.

5.3   GPIO Software Setup

Not mentioned GPIOs may use their default function.

GPIO in- and outputs can be accessed over the linux standard way via /sys/class/gpio, see: https://www.kernel.org/doc/Documentation/gpio/sysfs.txt

You may install the program named raspi-gpio by executing:

sudo  apt install  raspi-gpio

See the help text of the program how to change the function of the GPIOs. A good output will look like this:

BANK0 (GPIO 0 to 27):
GPIO 0: level=1 fsel=4 alt=0 func=SDA0
GPIO 1: level=1 fsel=4 alt=0 func=SCL0
GPIO 2: level=1 fsel=4 alt=0 func=SDA1
GPIO 3: level=1 fsel=4 alt=0 func=SCL1
GPIO 4: level=0 fsel=1 func=OUTPUT
GPIO 5: level=0 fsel=1 func=OUTPUT
GPIO 6: level=0 fsel=1 func=OUTPUT
GPIO 7: level=0 fsel=1 func=OUTPUT
GPIO 8: level=1 fsel=4 alt=0 func=SPI0_CE0_N
GPIO 9: level=0 fsel=4 alt=0 func=SPI0_MISO
GPIO 10: level=0 fsel=4 alt=0 func=SPI0_MOSI
GPIO 11: level=0 fsel=4 alt=0 func=SPI0_SCLK
GPIO 12: level=1 fsel=0 func=INPUT
GPIO 13: level=1 fsel=0 func=INPUT
GPIO 14: level=1 fsel=4 alt=0 func=TXD0
GPIO 15: level=1 fsel=4 alt=0 func=RXD0
GPIO 16: level=1 fsel=0 func=INPUT
GPIO 17: level=1 fsel=0 func=INPUT
GPIO 18: level=0 fsel=1 func=OUTPUT
GPIO 19: level=0 fsel=1 func=OUTPUT
GPIO 20: level=0 fsel=0 func=INPUT
GPIO 21: level=0 fsel=0 func=INPUT
GPIO 22: level=0 fsel=0 func=INPUT
GPIO 23: level=1 fsel=0 func=INPUT
GPIO 24: level=1 fsel=0 func=INPUT
GPIO 25: level=0 fsel=0 func=INPUT
GPIO 26: level=0 fsel=0 func=INPUT
GPIO 27: level=0 fsel=0 func=INPUT
BANK1 (GPIO 28 to 45):
GPIO 28: level=0 fsel=0 func=INPUT
GPIO 29: level=0 fsel=0 func=INPUT
GPIO 30: level=0 fsel=0 func=INPUT
GPIO 31: level=0 fsel=0 func=INPUT
GPIO 32: level=0 fsel=0 func=INPUT
GPIO 33: level=0 fsel=0 func=INPUT
GPIO 34: level=0 fsel=7 alt=3 func=SD1_CLK
GPIO 35: level=1 fsel=7 alt=3 func=SD1_CMD
GPIO 36: level=1 fsel=7 alt=3 func=SD1_DAT0
GPIO 37: level=1 fsel=7 alt=3 func=SD1_DAT1
GPIO 38: level=1 fsel=7 alt=3 func=SD1_DAT2
GPIO 39: level=1 fsel=7 alt=3 func=SD1_DAT3
GPIO 40: level=1 fsel=7 alt=3 func=SD1_DAT4
GPIO 41: level=1 fsel=7 alt=3 func=SD1_DAT5
GPIO 42: level=1 fsel=7 alt=3 func=SD1_DAT6
GPIO 43: level=1 fsel=7 alt=3 func=SD1_DAT7
GPIO 44: level=0 fsel=0 func=INPUT
GPIO 45: level=0 fsel=0 func=INPUT
BANK2 (GPIO 46 to 53):
GPIO 46: level=1 fsel=0 func=INPUT
GPIO 47: level=1 fsel=1 func=OUTPUT
GPIO 48: level=0 fsel=4 alt=0 func=SD0_CLK
GPIO 49: level=1 fsel=4 alt=0 func=SD0_CMD
GPIO 50: level=1 fsel=4 alt=0 func=SD0_DAT0
GPIO 51: level=1 fsel=4 alt=0 func=SD0_DAT1
GPIO 52: level=1 fsel=4 alt=0 func=SD0_DAT2
GPIO 53: level=1 fsel=4 alt=0 func=SD0_DAT3

5.4   Setting Flash Currents

At the default setup of the FPGA the flash output controller is accessable over the I2C Soft-GPIO. The value to write is calculated by the following formula:

val = (I_out * 192 / 1500) << 4

The I²C flash controller does not have register addresses, so submit the desired value using an I2C block write to the I²C flash controller address.

modprobe i2c-dev
i2cdetect 3
i2cset -y 3 0x0e 0x0C 0x10 i

5.5   Activating Flash output

The configuration file /boot/config_vc-mipi-driver-bcm2835.txt is available after installing the driver package. It has a parameter to configure the I/O of each connected sensor. Look at the documentation for your sensor type which value is appropriate for the device tree parameter cam0_io_config or cam1_io_config.

6.1   Order numbers of all available Accessories